Integrated circuits can be used in optically related applications such as sensor and optoelectronic signal transmission applications. Such integrated circuits contain devices for sensing and detecting light. As in most integrated circuit applications, the integrated circuit chips are packaged in a protective casing that allows the chip to be connected with an electrical system. For example, chips are commonly packaged in casings that have conductive leads that connect the chips to external systems such as printed circuit boards. With optical applications however, the packaging needs to allow light to reach the light sensing and/or detecting devices on an integrated circuit chip. One technique for allowing light to reach a chip is to mount the chip within a cavity of a package and then enclose the chip within the cavity with a plate of glass or clear plastic. This type of packaging is shown in FIGS. 1 and 2. FIG. 1 is a top plan view an optical device package 100 as is currently known, which includes a case 102 having a cavity and a transparent plate 104. FIG. 2 is a side-plan cross-sectional view of optical device package 100 of FIG. 1 along line 2—2. An integrated circuit chip 106 is mounted inside the cavity 108 of case 102 and is electrically connected to case 102 through interconnecting wires 110. Transparent plate 104 allows light to enter package 100 and reach the optical devices formed on the surface of chip 106. Electrical vias embedded within case 102 connect interconnecting wires 110 to electrical contacts on the external surfaces of case 102 so that contact with an external system can be made. An example of package 100 of FIGS. 1 and 2 is a ceramic cavity package where case 102 is made of a ceramic material. Unfortunately, packages resembling package 100 have certain drawbacks. First of all, the transparent plate and case are expensive, especially when the case is formed of ceramic. Secondly, it is also expensive to implement the specialized manufacturing processes related to placing the transparent plate onto the case. Finally, this packaging configuration usually is relatively large in size and therefore is less amenable for use in small-scale applications.
A second technique for packaging optical integrated circuit chips is to encase the chips in typical packaging form factors using clear molding material. Such typical form factors include QFP, TSSOP, DIP, etc. In many of these packaging form factors, the chip is wire bonded to the contact leads. Unfortunately, clear molding material has a higher coefficient of thermal expansion (CTE) than that of typical opaque molding material. Therefore, during heating and cooling processes, the large CTE causes the clear molding material to tear apart the connections made between the interconnecting wires and the bond pads on the chip or the contact leads. This leads to defective optical components that cannot be utilized.
In view of the foregoing, a technique for packaging optical integrated circuits within a structurally sound, cost-effective package having a small form factor would be desirable.